Low Noise with Wide Band Transimpedance Amplifier for Nonlinear Fiber Optical Applications

DOI: 10.33899/rjs.2020.164476 ABSTRACT A current-mirror based transimpedance amplifier with inductor feedback simulation is reported. A 90 nm channel length process technology was simulated using N-MOSFET and PMOSFET transistors. A transimpedance gain of 43.92 dBΩ was achieved with a bandwidth of 10 GHz (from 5 GHz to 15 GHz). The whole process was simulated using 1V DC supply voltage. From simulated data, pole frequency was found to be around 19.25 GHz. At 35 oC, the transimpedance amplifier circuit was simulated and it was found that the input referred noise current of the circuit is 14.14 pA/√Hz at 5 GHz, 10 pA/√Hz at 10 GHz and 16.32 pA/√Hz at 15 GHz to cover the entire bandwidth of the circuit.


INTRODUCTION
Many challenges in Giga-bit-per-second (Gbps) fiber optic applications remain unresolved despite considerable advances in high speed electronics. The need for low power, low cost and highly efficient receiver transimpedance (TIA) devices is ever more intense. Current mirror research work is considered one of the useful tools in achieving considerable transimpedance gain. In the last year, a low power current-mirror based TIA for 10 Gbps was achieved with TIA gain of 40.5 dBΩ with bandwidth of 7 GHz and power consumption of 1.4 mW at 1V supply (Zohoori et al., 2018) . A 9 GHz bandwidth with 50 dBΩ TIA gain was achieved using Regulated Cascode (RGC) configuration with T-matching coil network (Seifouri et al., 2015). A push-pull inverter with a feedback resistor was investigated and in a later stage a coil was added in series with the feedback resistor and in this work a TIA gain of 50.8 dBΩ was reached with a bandwidth of 7.9 GHz (Salhi et al., 2017). An inductorless 10 Gb/s TIA using the configuration of push-pull current mirror was achieved with a TIA gain of 57.5 dBΩ and 6.6 GHz bandwidth (Hassan and Zimmermann, 2012). A transimpedance amplifier with current mirror load was investigated in which a bandwidth of 1.05 GHz with a TIA gain of 64.5 dBΩ was realized (Atef, 2014).
In this work, a highly extended TIA bandwidth is simulated using Microwave Office 2001 Software (www.ni.com) with considerable TIA gain using current mirror based transimpedance amplifier.

Transimpedance Gain Derivation:
The proposed current mirror transimpedance amplifier (TIA) circuit is shown in Figure 1. TIA gain derivation can be defined according to Mason's Rule (Mason and Zimmermann, 1960) as illustrated in Figure 2 following a Signal Flow Graph representation. This circuit topology has significant development over previous work (Phang, 2001) and (Phang and Johns, 2001) as it will be seen later. That is in addition to already reported research (Zohoori et al., 2018) and (Hassan and Zimmermann, 2012). As it can be seen from circuit in Fig. (1) that there is an output to input direct feedback starting from a common-gate input configuration and ending up with a commonsource output.
A current-mirror involves transistors M 2 and M 3 is biased via the output (drain) of Transistor M 1 . The input current generated by the photodiode is given as I PD .

Fig. 1: The proposed transimpedance amplifier circuit.
At current gain of one, the principle of current mirror configuration is applied in which bias current at input stage is a mirror of bias current at output stage. That is because once gate-source voltage is fixed for transistors M 2 and M 3 , the drain current of each transistor is considered to be a mirror for the other transistor drain current.
The general formula for the transimpedance gain follows the Mason's rule (Mason and Zimmermann , 1960): (1) In the proposed TIA circuit and according to signal flow graph in Fig. (2), and that is due to the fact that there is no feedback loop (i.e. loops L 1 , L 2 and L 3 are not touching the k th forward signal path). However, in which there is no sum of loops products, but only summation of individual loops subtracted from one. Therefore, Equation (1) becomes: (2) Considering that is the transconductance of transistor M 3 , is the transconductance of transistor M 1 and is the conductance of the source at transistor M 1 . is the input admittance of the proposed TIA circuit and is expressed as: for which: is the photodiode capacitance, is the gate-source capacitance of transistor M 1 and is the drain-bulk capacitance of transistor M 2 , for which is the circuit input capacitance.
The admittance of node N is expressed as in which: is the drain-bulk capacitance of transistor M 1 , is the gate-source capacitance of transistor M 2 and is the gate-source capacitance of transistor M 3 . is the feedback coil inductance which was taken equals to 2.4 nH. The term represents the feedback inductive reactance and therefore, the term is the feedback system frequency dependent admittance.
Loops equations are given according to Figure 2 as follows: (6) By substituting Equations (3), (6), (7) and (8) in equation (1), the TIA gain is derived as: A pole zero can be found by equating the numerator to zero, in which s = 0. In Equation (9), corresponds to I PD of proposed TIA circuit in Fig.(1). The denominator root coefficients are expressed as: It is clear from Equation (9) and the subsequent Equations (10 -14) that the TIA gain depends in proportional relationship on , while it is inversely proportional with all capacitances in Equations (10 -13) and that includes the most important parasitic capacitance .
Reducing circuit input capacitance might be a great technical challenge and so as other capacitances. However, raising transconductance may be a good way for further improvement of TIA gain, although it may well be at the expense of circuit bandwidth for what is called a tradeoff relationship between gain and bandwidth.
Simulated TIA gain of circuit proposed is shown in Fig. (3). It exhibits a transimpedance gain of around 150, meaning that V OUT is 150 times I PD . That is within the bandwidth of 10 GHz (between 5 -15 GHz).
Given that input current I PD is simulated at 100 µA, the output voltage V OUT was obtained to be 15 mV. The general formula of Equation (9) may differ in results between different process technologies. Present research work is based on 90 nm process in which the N-MOSFET transistors M 1 , M 2 , M 3 are configured for an "Aspect Ratio" (W/L) of (5µm/90nm), while P-MOSFET current source transistor M 2b is configured for (0.9µm/90nm) and P-MOSFET current source transistor M 3b is configured the same as the N-MOSFET transistors. The transimpedance gain direct simulation values are taken from the simulated measurement of V OUT divided by I PD as in Fig.(3).
A transformation of TIA gain can be achieved in dBΩ units by taking 20 log (V OUT /I PD ) of data in Fig. (3) to be in line with standard research work. A transimpedance gain of 43.92 dBΩ is obtained within the near flat bandwidth (BW) between 5 GHz to 15 GHz as in Fig.(4).
It was found that a near flat bandwidth (BW) of 10 GHz between (5 GHz to 15 GHz) according to simulated data of Figure 4. The fourth order polynomial fitting of Figure 4 suggests that the fourth order polynomial terms of Equation (9) are in good agreement with simulated transimpedance gain. A pole frequency ( ) of 19.25 GHz is achieved indicating the endpoint of the bandwidth within the frequency response of Fig. (4).

Output Impedance:
A small signal model from the output point of view for the proposed circuit is illustrated in Fig. (5). By placing an ac source named at the output with current named then the output impedance (frequency dependent) can be established. For the purpose of this calculation, input sources are short circuited according to Thevenin Theorem. then, By dividing by , the output impedance of the proposed circuit in Fig. (1) is derived as: The term represents the current mirror gain of the circuit and it is obvious from Equation (22) that the output impedance of the circuit depends on frequency in a linear manner. Therefore, it is linearly proportional to the inductive reactance of the coil, while it is inversely proportional to current mirror gain. At low frequencies, the output impedance will reduce significantly, while at high frequencies, it looks like it will rise dramatically, however, that will also depends on the state of the current mirror gain. The importance of output impedance comes from the fact that if the + output of the TIA circuit is connected to a next stage, the output impedance must match the input impedance of the next stage.

Noise Optimization:
To optimize the TIA circuit in terms of noise, the dominant thermal noise is taken into account in which each transistor is mainly considered as a source of noise due to its temperature increase via circuit bias DC current. This optimization involves seeing each input signal as it is mixed with the thermal noise at its input in what is defined as an input-referred current noise. This kind of noise is represented at drain of transistors. At 35 ºC, the TIA circuit was run and it was found that the input referred noise current of the circuit is 14.14 pA/√Hz at 5 GHz, 10 pA/√Hz at 10 GHz and 16.32 pA/√Hz at 15 GHz to cover the entire bandwidth of the circuit.
The above statement is in agreement with the concept that thermal noise should cover the entire bandwidth (i.e. per unit bandwidth) (Razavi, 2012). Following on the TIA circuit of Fig. (1), the drain of transistor M 1 is considered the main thermal noise point as it is connected with the gate of current mirror transistors M 2 and M 3 for which the thermal noise will appear at their drains. Given the fact that the drain of transistor M 3 is connected with the circuit output, therefore, a portion of that noise will be fed back through coil L f back to the input which is the point as the drain of transistor M 2 . Hence, the terminology of input referred noise meaning that the thermal noise is missed with the main signal. Fig. (6) illustrates the input referred current noise.

Fig. 6: Input referred noise current versus frequency of input signal CONCLUSION
A comprehensive simulation of current-mirror based transimpedance amplifier has been achieved. The feedback system simulation resulted in a transimpedance gain of 43.92 dBΩ for a flat bandwidth of 10 GHz within the range of (5 GHz -10 GHz). A pole frequency of 19.25 GHz showed the endpoint of the bandwidth flat response. The purpose of this work was to achieve a considerable TIA gain at maximum flat bandwidth, however, a low input referred noise current was reached for which 14.14 pA/√Hz at 5 GHz, 10 pA/√Hz at 10 GHz and 16.32 pA/√Hz at 15 GHz to cover the entire bandwidth of the circuit.